In this book, we tried to clarify the reconfigurability concept and to categorize all the existing approaches based on a general reconfigurability framework. We introduce reconfigurability as a layered concept which consists of two separated logical layers. The first layer is the algorithmic reconfigurability and represents the point of view of the algorithmic specialists. It refers to the ability of a reconfigurable system to dynamically change algorithms according to real time parameters to optimize well defined performance and complexity metrics. This layer introduces the need for an intelligent block which supervises the radio and makes the appropriate decisions. The second layer is hardware reconfigurability and represents the point of view of the hardware specialists. In this layer, reconfigurability is translated as a piece of hardware which can be modified to perform different functions at different times, allowing the hardware to be tailored to the application at hand. This results in greatly increased speed and silicon efficiency, while maintaining a high degree of flexibility.