Syndevs Co-Design Flow: A Hardware / Software Co-Design Flow Based on the Discrete Event System Specification Model of Computation
| AUTHOR | Molter, H. Gregor |
| PUBLISHER | Springer Vieweg (10/21/2012) |
| PRODUCT TYPE | Paperback (Paperback) |
The complexity of modern embedded systems has increased rapidly in the recent past. Introducing models of computation into the design flow has significantly raised the abstraction in system level design of embedded systems. Establishing such high abstraction levels in common hardware /software co-design flows is still in its infancy. H. Gregor Molter develops a hardware / software co-design flow based on the Discrete Event System Specification model of computation. He advocates that such a system level design flow should exploit a timed model of computation to allow a broad application field. The presented design flow will transform timed DEVS models to both synthesizable VHDL source code and embeddable C++ source code.
The complexity of modern embedded systems has increased rapidly in the recent past. Introducing models of computation into the design flow has significantly raised the abstraction in system level design of embedded systems. Establishing such high abstraction levels in common hardware /software co-design flows is still in its infancy. H. Gregor Molter develops a hardware / software co-design flow based on the Discrete Event System Specification model of computation. He advocates that such a system level design flow should exploit a timed model of computation to allow a broad application field. The presented design flow will transform timed DEVS models to both synthesizable VHDL source code and embeddable C++ source code.
Target Groups
Researchers and students in the fields of abstract system level design and synthesizable models of computation; Practitioners in the fields of cyber physical systems or embedded systems design.
About the Author
H. Gregor Molter completed his doctoral thesis at the department of Integrated Circuits and Systems Lab, Technische Universitt Darmstadt, under the supervision of Prof. Dr.-Ing. Sorin A. Huss.
Target Groups
Researchers and students in the fields of abstract system level design and synthesizable models of computation; Practitioners in the fields of cyber physical systems or embedded systems design.
About the Author
H. Gregor Molter completed his doctoral thesis at the department of Integrated Circuits and Systems Lab, Technische Universitt Darmstadt, under the supervision of Prof. Dr.-Ing. Sorin A. Huss.
The complexity of modern embedded systems has increased rapidly in the recent past. Introducing models of computation into the design flow has significantly raised the abstraction in system level design of embedded systems. Establishing such high abstraction levels in common hardware /software co-design flows is still in its infancy. H. Gregor Molter develops a hardware / software co-design flow based on the Discrete Event System Specification model of computation. He advocates that such a system level design flow should exploit a timed model of computation to allow a broad application field. The presented design flow will transform timed DEVS models to both synthesizable VHDL source code and embeddable C++ source code.