Variation-Aware Analog Structural Synthesis describes computational intelligence-based tools for robust design of analog circuits. It starts with global variation-aware sizing and knowledge extraction, and progressively extends to variation-aware topology design. The computational intelligence techniques developed in this book generalize beyond analog CAD, to domains such as robotics, financial engineering, automotive design, and more.

The tools are for:

• Globally-reliable variation-aware automated sizing via SANGRIA, leveraging structural homotopy and response surface modeling.
• Template-free symbolic models via CAFFEINE canonical form functions, for greater insight into the relationship between design/process variables and circuit performance/robustness.
• Topology selection and topology synthesis via MOJITO. 30 well-known analog building blocks are hierarchically combined, leading to >100,000 different possible topologies which are all trustworthy by construction. MOJITO does multi-objective genetic programming-based search across these topologies with SPICE accuracy, to return a set of sized topologies on the optimal performance/yield tradeoff curve.
• Nonlinear sensitivity analysis, topology decision trees, and analytical tradeoffs. With a data-mining perspective on Pareto-optimal topologies, this book shows how to do global nonlinear sensitivity analysis on topology and sizing variables, automatically extract a specs-to-topology decision tree, and determine analytical expressions of performance tradeoffs.
• Novel topology design. The MOJITO-N and ISCLEs tools generate novel yet trustworthy topologies; including boosting digitally-sized circuits for analog functionality.

This book describes new tools for front end analog designers, starting with global variation-aware sizing, and extending to novel variation-aware topology design. The tools aid design through automation, but more importantly, they also aid designer insight through automation. We now describe four design tasks, each more general than the previous, and how this book contributes design aids and insight aids to each. The ?rst designer task targeted is global robust sizing. This task is supported by a design tool that does automated, globally reliable, variation-aware s- ing (SANGRIA), and an insight-aiding tool that extracts designer-interpretable whitebox models that relate sizings to circuit performance (CAFFEINE). SANGRIA searches on several levels of problem dif?culty simultaneously, from lower cheap-to-evaluate "exploration" layers to higher full-evaluation "exploitation" layers (structural homotopy). SANGRIAmakes maximal use of circuit simulations by performing scalable data mining on simulation results to choose new candidate designs. CAFFEINE accomplishes its task by tre- ing function induction as a tree-search problem. It constrains its tree search space via a canonical-functional-form grammar, and searches the space with grammatically constrained genetic programming. The second designer task is topology selection/topology design. Topology selection tools must consider a broad variety of topologies such that an app- priate topology is selected, must easily adapt to new semiconductor process nodes, and readily incorporate new topologies. Topology design tools must allow designers to creatively explore new topology ideas as rapidly as possible.